
MAX1510 Datasheet
Low-Voltage DDR Linear Regulators
Low-Voltage DDR Linear Regulators
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The MAX1510 DDR linear regulators source and sink up to 3A peak (typ) using internal n-channel MOSFETs. These linear regulators deliver an accurate 0.5V to 1.5V output from a low-voltage power input (VIN = 1.1V to 3.6V). The MAX1510 use a separate 3.3V bias supply to power the control circuitry and drive the internal n-channel MOSFETs.
The MAX1510 provide current and thermal limits to prevent damage to the linear regulator. Additionally, the MAX1510 generate a power-good (PGOOD) signal to indicate that the output is in regulation. During startup, PGOOD remains low until the output is in regulation for 2ms (typ). The internal soft-start limits the input surge current.
The MAX1510 power the active-DDR termination bus that requires a tracking input reference. The MAX1510 can also be used in low-power chipsets and graphics processor cores that require dynamically adjustable output voltages. The MAX1510 are available in a 10-pin, 3mm × 3mm thin DFN package.