AD9257 Datasheet

Octal, 14-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter

Part No.:
AD9257
Manufacturer:
Analog Devices, Inc.
Page:
38 Pages
Size:
3277 KB
Views:
0
Update Time:
2026-02-06 15:48:41

AD9257 DataSheet Applicable Part

Part No. In Stock Price Packaging SPQ Marking MSL Pins Temp Range Package Description
SPQ:Standard Pack Quantity;MSL:Moisture Sensitivity Level

AD9257 DataSheet PDF

AD9257 Features

  • Low power: 55 mW per channel at 65 MSPS with scalable power options
  • SNR = 75.5 dB (to Nyquist)
  • SFDR = 91.6 dBc (to Nyquist)
  • DNL = ±0.6 LSB (typical), INL = ±1.1 LSB (typical)
  • Serial LVDS (ANSI-644, default)
  • Low power, reduced signal option (similar to IEEE 1596.3)
  • Data and frame clock outputs
  • 650 MHz full power analog bandwidth
  • 2 V p-p input voltage range
  • 1.8 V supply operation
  • Serial port control
    • Full chip and individual channel power-down modes
    • Flexible bit orientation
    • Built-in and custom digital test pattern generation
    • Programmable clock and data alignment
    • Programmable output resolution
    • Standby mode

AD9257 Applications

  • Medical imaging and nondestructive ultrasound
  • Portable ultrasound and digital beam-forming systems
  • Quadrature and diversity radio receivers
  • Optical networking
  • Test equipment

AD9257 Description

The AD9257 is an octal, 14-bit, 40 MSPS and 65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.

The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.

The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.

The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).

The AD9257 is available in an RoHS-compliant, 64-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.

AD9257 Datasheet FAQs