LTC2204 Datasheet

• Sample Rate: 40Msps
• 79dB SNR and 100dB SFDR (2.25V_P-P Range)
• SFDR >92dB at 140MHz (1.5V_P-P Input Range)
• PGA Front End (2.25VP-P or 1.5V_P-P Input Range)
• 700MHz Full Power Bandwidth S/H
• Optional Internal Dither
• Optional Data Output Randomizer
• Single 3.3V Supply
• Power Dissipation: 610mW/480mW
• Optional Clock Duty Cycle Stabilizer
• Out-of-Range Indicator
• Pin Compatible Family
  • 105Msps: LTC2207 (16-Bit), LTC2207-14 (14-Bit)
  • 80Msps: LTC2206 (16-Bit), LTC2206-14 (14-Bit)
  • 65Msps: LTC2205 (16-Bit), LTC2205-14 (14-Bit)
  • 40Msps: LTC2204 (16-Bit)
• 48-Pin (7mm × 7mm) QFN Package

• Telecommunications
• Receivers
• Cellular Base Stations
• Spectrum Analysis
• Imaging Systems
• ATE

The LTC2204 are sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals up to input frequencies of 700MHz. The input range of the ADC can be optimized with the PGA front end.

The LTC2204 are perfect for demanding communications applications, with AC performance that includes 79dB SNR and 100dB spurious free dynamic range (SFDR). Ultralow jitter of 90fsRMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±4LSB INL, ±1LSB DNL (no missing codes). A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V.

The ENC⁺ and ENC^– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.