LTC2185 Datasheet

• Two-Channel Simultaneously Sampling ADC
• 76.8dB SNR
• 90dB SFDR
• Low Power: 370mW/308mW/200mW Total 185mW/154mW/100mW per Channel
• Single 1.8V Supply
• CMOS, DDR CMOS, or DDR LVDS Outputs
• Selectable Input Ranges: 1V_P-P to 2V_P-P
• 550MHz Full Power Bandwidth S/H
• Optional Data Output Randomizer
• Optional Clock Duty Cycle Stabilizer
• Shutdown and Nap Modes
• Serial SPI Port for Configuration
• 64-Pin (9mm × 9mm) QFN Package

• Communications
• Cellular Base Stations
• Software Defined Radios
• Portable Medical Imaging
• Multi-Channel Data Acquisition
• Nondestructive Testing

The LTC2185 is two-channel simultaneous sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 76.8dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.07ps_RMS allows undersampling of IF frequencies with excellent noise performance.

DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ) and no missing codes over temperature. The transition noise is 3.4LSB_RMS.

The digital outputs can be either full rate CMOS, Double Data Rate CMOS, or Double Data Rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.

The ENC⁺ and ENC^– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.