ADP5043 Datasheet

Micro PMU with 800 mA Buck, 300 mA LDO, Supervisory, Watchdog, and Manual Reset

Part No.:
ADP5043
Manufacturer:
Analog Devices, Inc.
Page:
30 Pages
Size:
1801 KB
Views:
0
Update Time:
2026-01-05 17:54:23

ADP5043 DataSheet Applicable Part

Part No. In Stock Price Packaging SPQ Marking MSL Pins Temp Range Package Description
SPQ:Standard Pack Quantity;MSL:Moisture Sensitivity Level

ADP5043 DataSheet PDF

ADP5043 Features

  • Input voltage range: 2.3 V to 5.5 V
  • One 800 mA buck regulator
  • One 300 mA LDO
  • 20-lead, 4 mm × 4 mm LFCSP package
  • Initial regulator accuracy: ±1%
  • Overcurrent and thermal protection
  • Soft start
  • Undervoltage lockout
  • Open-drain processor reset with threshold monitoring
  • ±1.5% threshold accuracy over the full temperate range
  • Guaranteed reset output valid to VCC = 1 V
  • Dual watchdog for secure systems
    • Watchdog 1 controls reset
    • Watchdog 2 controls reset and regulators power cycle
  • Buck regulator key specifications
    • Current-mode topology for excellent transient response
    • 3 MHz operating frequency
    • Uses tiny multilayer inductors and capacitors
    • Mode pin selects forced PWM or auto PFM/PSM modes
    • 100% duty cycle low dropout mode
  • LDO key specifications
    • Low VIN from 1.7 V to 5.5 V
    • Stable with1 μF ceramic output capacitors
    • High PSRR, 60 dB up to 1 kHz/10 kHz
    • Low output noise
    • Low dropout voltage: 150 mV at 300 mA load
    • −40°C to +125°C junction temperature range

ADP5043 Description

The ADP5043 combines one high performance buck regulator and one low dropout (LDO) regulator in a small 20-lead LFCSP to meet demanding performance and board space requirements.

The high switching frequency of the buck regulator enables use of tiny multilayer external components and minimizes board space.

The MODE pin selects the buck’s mode of operation. When set to logic high, the buck regulator operates in forced PWM mode. When the MODE pin is set to logic low, the buck regulator operates in PWM mode when the load is around the nominal value. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM) improving the light-load efficiency.

The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5043 LDO extend the battery life of portable devices. The LDO maintains a power supply rejection of greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.

Each regulator is activated by a high level on the respective enable pin. The ADP5043 is available with factory programmable default output voltages and can be set to a wide range of options.

The ADP5043 contains supervisory circuits that monitor  power supply voltage levels and code execution integrity in microprocessor-based systems. The ADP5043 also provides power-on reset signals. An on-chip dual watchdog timer can reset the microprocessor or power cycle the system (Watchdog 2) if it fails to strobe within a preset timeout period.

ADP5043 Datasheet FAQs