ADP1754 Datasheet

• Maximum output current: 1.2 A
• Input voltage range: 1.6 V to 3.6 V
• Low shutdown current: <2 μA
• Very low dropout voltage: 105 mV @ 1.2 A load
• Initial accuracy: ±1%
• Accuracy over line, load, and temperature: ±2%
• 7 fixed output voltage options with soft start 0.75 V to 2.5 V (ADP1754)
• High PSRR
  (See data sheet for details)
• 23 μV rms at 0.75 V output
• Stable with small 4.7 μF ceramic output capacitor
• Excellent load and line transient response

• Server computers
• Memory components
• Telecommunications equipment
• Network equipment
• DSP/FPGA/microprocessor supplies
• Instrumentation equipment/data acquisition systems

The ADP1754 are CMOS, low dropout linear regulators that operate from 1.6 V to 3.6 V and provide up to 1.2A of output current. These Low V_in / V_out LDOs are ideal for regulation of nanometer FPGA geometries operating from 2.5V down to 1.8V I/O rails, and powering core voltages down to 0.75V. Using an advanced proprietary architecture, they provide high power supply rejection, low noise, and achieve excellent line and load transient response with a small 4.7 µF ceramic output capacitor.

The ADP1754 is available in 7 fixed output voltage options. The ADP1754 allows an external soft start capacitor to be connected to program the start-up. A power good output allows power system monitors to digitally check the health of the output power rail voltage.

The ADP1754 are available in a 16-lead, 4 mm × 4 mm LFCSP, making them not only very compact solutions, but also providing excellent thermal performance for applications requiring up to 1.2A of output current in a small, low profile footprint.