AD9776 Datasheet

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Package Description

• Low power: 1.0 W @ 1 GSPS, 600 mW @ 500 MSPS, full operating conditions
• SFDR = 78 dBc to f_OUT = 100 MHz
• Single carrier WCDMA ACLR = 79 dBc @ 80 MHz IF
• Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω
• Auxiliary DACs allow control of external VGA and offset control
• Multiple chip synchronization interface
• High performance, low noise PLL clock multiplier
• Digital inverse sinc filter
• 100-lead, exposed paddle TQFP package
• See datasheet for additional features

• Wireless infrastructure
  WCDMA, CDMA2000, TD-SCDMA, WiMax, GSM
• Digital high or low IF synthesis
• Internal digital upconversion capability
• Transmit diversity
• Wideband communications: LMDS/MMDS, point-to-point

The AD9776 are dual, 12-bit, high dynamic range, digital-to-analog converters (DACs) that provide a sample rate of 1 GSPS, permitting multicarrier generation up to the Nyquist frequency. They include features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators such as the AD8349. A serial peripheral interface (SPI^®) provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 10 mA to 30 mA. The devices are manufactured on an advanced 0.18 μm CMOS process and operate on 1.8 V and 3.3 V supplies for a total power consumption of 1.0 W. They are enclosed in 100-lead TQFP packages.