AD5681R Datasheet

• Ultrasmall package: 2 mm × 2 mm, 8-lead LFCSP
• High relative accuracy (INL): ±2 LSB maximum at 16 bits
• AD5681R
  • Low drift, 2.5 V reference: 2 ppm/°C typical
  • Selectable span output: 2.5 V or 5 V
• Total unadjusted error (TUE): 0.06% of FSR maximum
  • Offset error: ±1.5 mV maximum
  • Gain error: ±0.05% of FSR maximum
• Low glitch: 0.1 nV-sec
• High drive capability: 20 mA
• Low power: 1.2 mW at 3.3 V
• Independent logic supply: 1.62 V logic compatible
• Wide operating temperature range: −40°C to +105°C
• Robust 4 kV HBM ESD protection

• Process controls
• Data acquisition systems
• Digital gain and offset adjustment
• Programmable voltage sources

The AD5681R, members of the nanoDAC+^® family, are low power, single-channel, 12-bit buffered voltage out digital-to-analog converters (DACs). The devices include an enabled by default internal 2.5 V reference, offering 2 ppm/°C drift. The output span can be programmed to be 0 V to V_REF or 0 V to 2 × V_REF. All devices operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design. The devices are available in a 2.00 mm × 2.00 mm, 8-lead LFCSP or a 10-lead MSOP.

The internal power-on reset circuit ensures that the DAC register is written to zero scale at power-up while the internal output buffer is configured in normal mode. The AD5681R contain a power-down mode that reduces the current consumption of the device to 2 µA (maximum) at 5 V and provides software selectable output loads while in power-down mode.

The AD5681R use a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz. Some devices also include asynchronous RESET pin and V_LOGIC pin options, allowing 1.8 V compatibility